代写COMPSCI 4043 Systems and Networks 2023代做Python语言

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Systems and Networks

COMPSCI 4043

December 2023

1. (a) Express the following numbers in 8-bit two’s complement representation, giving your answers in hexadecimal. Show your working.

i. 100 ii. -127 [4]

(b) Find two 8-bit codewords such that, if input to an 8-bit adder, they would simultaneously

generate both unsigned (C-bit) and signed (V-bit) overflows. By arguing from the numbers your words represent in an unsigned and in a signed code, show that overflow would indeed occur in both cases. [4]

(c) Write Sigma16 code to read a (validated) 16-bit Sigma16 operation word from a memory variable OP and determine if the word represents an RRR instruction. Then, store a Boolean result in variable TYPE such that TYPE is TRUE if and only if the instruction is RRR. Comment the code to show what you are doing but no need to include HLL outline or register table. [5]

(d) Write a commented Sigma16 program (including HLL outline and register use table) to process an array,X, of 16-bit signed numbers in memory according to the following rule: if X[i] is a positive multiple of 3 replace it with zero, otherwise leave it unchanged. [7]

For reference, here is a summary of the instruction set of the Sigma16 CPU.

Mnemonic Syntax Action

lea	Rd, x[Ra]	Rd:= x +Ra
load	Rd, x[Ra]	Rd:= mem[x +Ra]
store	Rd, x[Ra]	mem[x +Ra]:=Rd
add	Rd,Ra,Rb	Rd:= Ra+Rb
sub	Rd,Ra,Rb	Rd:= Ra-Rb
mul	Rd,Ra,Rb	Rd:= Ra*Rb
div	Rd,Ra,Rb	Rd:= Ra/Rb, R15:=Ra mod Rb
and	Rd,Ra,Rb	Rd:= Ra AND Rb
inv	Rd,Ra,Rb	Rd:= NOT Ra
or	Rd,Ra,Rb	Rd:= Ra OR Rb
xor	Rd,Ra,Rb	Rd:= Ra XOR Rb
cmplt	Rd,Ra,Rb	Rd:= Ra
cmpeq	Rd,Ra,Rb	Rd:= Ra=Rb
cmpgt	Rd,Ra,Rb	Rd:= Ra>Rb
shiftl	Rd,Ra,Rb	Rd:=Ra logic shifted left Rb places
shiftr	Rd,Ra,Rb	Rd:=Ra logic shifted right Rb places
jumpf	Rd, x[Ra]	If Rd=0 then PC:=x+Ra
jumpt	Rd, x[Ra]	If Rd<>0 then PC:=x+Ra
jal	Rd, x[Ra]	Rd:= pc, pc: =x +Ra
trap	R0,R0,R0	Jump back to system. Stops user program.
jump	x[Ra]	PC:= x +Ra

2 (a) With reference to how a stack would be implemented in a Sigma16 program, to handle subroutine calls,

explain what is meant by a stack overflow and describe a scenario where such an overflow might occur. [4]

(b) The following Sigma16 program is intended to take a 10-element array of unsigned numbers (only the first DATA element is shown), count the number of elements with values less than 256 ($100) and store the result in the variable COUNT. The approach taken is to check for any “ 1” bits in the upper byte of each element: if there are none, the number is <256. However,although the code will assemble, it contains several logical errors (as opposed to syntax errors or inefficiencies, which you may ignore).

LOAD R1,$00FF[R0] ;Set R1 to constant 255

LEA R6,1[R0] ;Set R6 to constant 1

ADD R2,R0,R0 ;Set COUNT =0

ADD R3,R0,R0 ;i:=0

LOAD R7,n[R0] ;Set R7 to n

FOR CMPEQ R14,R3,R7 ;Is i=n?

JUMP OUT[R0] ;if yes, exit

LOAD R4,X[R3] ;load X[i]

AND R4, R4,R1 ;Zero Least significant Byte

CMPEQ R5,R4,R0 ;Is result 0?

ADD R2,R2,R5 ;If yes, increment COUNT

JUMP FOR[R0] ;Loop

OUT STORE R2,COUNT[R3] ;Store COUNT in memory

TRAP R0,R0,R0

; Data Area

n DATA 10

COUNT DATA 0

X DATA 8

DATA ...

i. Draw up a register use table for the program (suitable for inclusion as comment).

ii. Why not use CMPGT to check if X[i] > 255 instead of checking for “ 1” bits in the upper byte?

iii. Identify the errors and explain how you would correct them. [7]

(d) In the corrected program, calculate the advantage a system with a cache memory would gain if a primary memory cycle took 10ns and a cache cycle 1ns. [4]

3. (a) Suppose a microprocessor runs only one process whose only task is to service I/O devices which are many orders of magnitudeslower than the instruction cycle time. Discuss the pros and cons of using hardware interrupts rather than busy waits to service the devices. [4]

(b) A (hypothetical) hardware Sigma16 CPU is connected to an input device through a port which has a memory-mapped control/status register at the memory address STATUSREG. The second most significant bit of the 16-bit content of STATUSREG is an input ready flag and goes to 1 when the device requires service. Write a program segment in Sigma16 assembly language to implement a busy wait on this device and estimate the maximum time the program will take to react if the flag goes high, assuming each memory cycle takes 10ns. (You do not need to provide code for the routine that will service the device when the flag goes to 1.) Hint: Do not assume that the other bits of STATUSREG will necessarily be zero. [6]

(c) Explain how it is possible for a protocol like TCP to be reliable when it is carried by IP and Ethernet, both of which are unreliable. [3]

(d) During a file transfer operation over the Internet, an Ethernet frame carrying a part of the file

suffers a biterror on one of the networks along the path. Explain what will happen and how the file transfer can be repaired. [7]