代做ECEN7003 Microelectronic Circuit Design Project-1代做Prolog

ECEN7003 (001)

Microelectronic Circuit Design

Project-1

MOSFET Characteristic Analysis and Single-stage Amplifier Design

Part-I MOSFET Characteristic Analysis and Simulation

Part-I Objectives:

1. Basic I-V characteristic:

(1) Based on the simulated results, analyze the ID -VDS, ID -VGS relations of 1.2-V NMOS;

(2) figure out the operation regions;

(3) estimate the corresponding gm & rout from their definitions.

(Hint: by doing parametric analysis in Cadence)

2. Body effect and short-channel effect:

Simulate, observe, and try to discuss the effect from VSB and channel length L on the Vth of 1.2-V NMOS.

3. Simulation vs hand-calculation of ID:

Obtain the parameters of μnCox and λ (channel length modulation coefficient) for 1.2-V NMOS from simulation. Use them in the hand calculation of ID then compare the calculated result with the simulated ones.

(Hint: the ‘betaeff’ parameter in DC analysis simulation result represent the ‘μnCoxW/L’)

Part-II Single-stage Amplifier Design and Simulation

Part-II Objectives:

1. Schematic design and simulation:

Use 1.2-V CMOS devices to design and simulate CS, CG, and SF amplifiers. (Body effect discussion is suggested)

2. Layout implementation (*optional bonus):

For the designed CS amplifier, perform. DRC/LVS check and try to run post-layout simulations with RC extraction

Design Specifications for 1.2-V Amplifiers:

                               CS                       CG                       SF (CD)

Gain                     >20 dB                 >20 dB                    >-2 dB

GBW                   >500 MHz            >500 MHz                >600 MHz

Power                  < 0.6 mW           < 0.6 mW                 < 0.6 mW

Supply Voltage                                    1.2V

Capacitive Load                                   1 pF

• The overall achieved performance would be the higher, the better, i.e., higher gain, larger GBW, lower power, and smaller area.

Important:

➢ Individual project report submission due: 15 Oct. 2024, 00:00

➢ Project-1 is an individual project. It is required to complete it and submit the report individually.

➢ Report guideline can be found in UMMoodle.